Sunday, February 22, 2015

The PDP-8: A lesson in longevity

The PDP-8 was launched in March 1965 and was produced in various forms for the next 15 years, each time benefiting from technological advances and cost reduction.

Now as we approach the 50th anniversary of the PDP-8, there is still much to be gained from studying it's simple architecture and instruction set.

The PDP-8 was the immediate successor to the PDP-5 (1963), DEC's first 12 bit minicomputer. As such it ran the same instruction set,  but more than 5 times as fast. First a little history of the PDP-5.

The PDP-5 was originally conceived as a "Digital Controller", and even a week before it's launch it was called the DC-12. In a mad rush, the management at DEC decided that it was a real computer, and designated it the PDP-5. They spent the week changing all their marketing literature to reflect the name change.

The PDP-5 was intended to be a "small computer" for industrial monitoring tasks, which was to be connected to a larger mainframe, originally the 18 bit PDP-4.   This combination of a small computer, acting as an I/O handler for a larger machine was first developed by Seymour Cray in 1960, with the 12-bit CDC 160. Inspired by the CDC 160, the engineers at DEC decided to design their own small, 12 bit computer.

For a flavour of what it was like to work with a 1965 vintage PDP-8, I watched the excellent videos from the National Museum of Computing, based on their restored PDP-8. I later spent a great Sunday afternoon last summer, looking at the real PDP-8 at the Museum in Bletchley.

The architecture of the PDP-8 has been widely studied, copied, and implemented in various technologies from 7400 TTL gates right through to high speed FPGA designs, written in VHDL or Verilog.

Although originally built using discrete transistor and diode logic, using the standard logic modules DEC had developed in the late 1950's, as time progressed, and technology improved, the PDP-8 was re-implemented several times, each time getting smaller and cheaper.

Inspired by the simplicity of the early 12 bit designs, I pondered for a while how to make the essence of these machines more accessible to the enthusiast or hobbyist.

I'm not a FPGA engineer, so I decided that I would make an exploration of the PDP-8 architecture and instruction set  and implement it on a modern hardware platform by way of an emulation based on the popular Arduino.

Instruction Set.

Wikipedia has a good description of the PDP-8 Instruction Set, and it shows just how much could be crammed into a very simple design.  Unfortunately, the instruction set has very few op-codes, with only 8 basic instructions, - so if you wanted to do anything clever, it had to be done using some fancy tricks and multiple instructions. This led to the use of macros (multiple instructions), for some of the operations that today would normally be handled by a single instruction.

Later versions of the PDP-8 had an Extended Arithmetic Element (EAE), which was an add-on extra that provided multiply, divide and other arithmetic operations - accelerated by the use of dedicated hardware rather than coded in firmware.

C++ Interpreter - written on Arduino

The aim of this experiment - and it is little more than an experiment, was to determine whether a fairly modern 8-bit microcontroller, running at 16MHz and programmed in relatively standard C, and C++, could interpret PDP-8 machine code, at a rate that is comparable to the performance of the original 1965 machine.

This was the primary aim, but the project also has an educational basis, helping to teach the fundamentals of simple computer architecture, instruction sets and assembly language programming - and also trying to give some insight into what programming was like, almost 50 years ago.

In the 1960s, it was normal to represent numbers on computer systems using the octal system.  At that time (before the introduction of ASCII), the fundamental unit for a printable character was 6 bits. So computers had word sizes based on multiples of 6 bits. Early DEC computers were designed around 36, 18 and 12 bit word lengths - so that characters could be efficiently packed into memory.

These days, it is hard to comprehend how much the core memory cost.  In 1967, based on a DEC pricelist to extend the PDP-8 memory by 4K words, would cost almost half the cost of the $18,000 PDP-8 machine. (In 1967, a new VW Beetle cost $1769).

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